How a computer remembers.

A logic gate reacts now. Memory preserves something that happened before. Follow one stored bit from a latch to a clocked register, then compare SRAM, DRAM, ROM, magnetic core and a rotating magnetic disk.

1. Two gates can remember one bit

A combinational gate produces an output from its current inputs. Cross-couple two NOR gates and the circuit gains feedback: the present output helps determine the next output. That feedback lets the circuit retain a state after the SET or RESET signal disappears.

SR latch — cross-coupled NOR gatesSET makes Q=1, RESET makes Q=0, and S=R=0 holds the previous state.
Q
SNORQ RNOR feedback preserves the state

2. A clock decides when memory may change

A D-type flip-flop captures its data input on a clock edge and then holds that value. Put several flip-flops beside one another and you have a register: a small block of fast memory inside a processor.

Edge-triggered D flip-flopChange D as often as you like; Q changes only when you pulse CLOCK.
Q = 0
DD FLIP-FLOPcaptures D on ↑ clockCLOCKQQ holds 0 while the input can change.

3. SRAM: a stable bit made from transistors

Static RAM keeps each bit in a bistable transistor circuit while power is present. A conventional CMOS SRAM cell uses six transistors: four form two cross-coupled inverters and two connect the cell to complementary bit lines when the word line is selected.

Conceptual 6T SRAM cellWrite through BL / BL̅, then read the stored state through the access transistors.
BLBL̅WORD LINEACCESSACCESSINVINVQCross-coupled inverters hold the bit without refresh.

4. DRAM: one transistor, one capacitor — and a deadline

Dynamic RAM stores a bit as electrical charge on a tiny capacitor selected by one access transistor. The charge leaks away, so the memory controller must periodically read and restore every row. This lab exaggerates the leakage rate so you can watch refresh become necessary.

1T1C DRAM cellWrite a charge, disable refresh, and watch the voltage decay toward an unreadable state.
100%
Charge 100% → sensed as 1.

For clarity, this demonstration uses an arbitrary threshold of 50% and a very fast leakage rate. Real DRAM timing is specified in milliseconds and managed invisibly by the memory controller.

5. ROM remembers by construction

RAM is intended to change while the machine runs. Read-only memory instead encodes a fixed pattern in the circuit or device. In a mask ROM, the presence or absence of a transistor or connection at each matrix position determines the data returned for an address.

8 × 4 mask-ROM matrixSelect an address. Blue dots are the fixed connections that encode a 1 in this simplified matrix.
DATA OUTD3D2D1D01010₂ = A₁₆

6. Before semiconductor RAM: magnetic core memory

For much of the 1950s and 1960s, main memory was made from tiny ferrite rings threaded by wires. Each ring could be magnetized in one of two directions. Core memory was non-volatile, physically robust and expensive to manufacture; reading a core was destructive, so the circuitry rewrote the detected bit.

16-bit core planeClick a core to magnetize it. Then select a core and perform a destructive read followed by rewrite.
Select a core. Gold ring = 1, grey ring = 0.

7. Memory becomes storage when the medium can wait

Main memory is addressed electronically and responds in nanoseconds or microseconds. Magnetic disks trade speed for persistence and capacity. Data is arranged into tracks and sectors on a rotating surface, and a mechanical head must first seek to the correct radius and then wait for the desired sector to rotate underneath it.

rotation

The animation is deliberately slow and schematic. Real floppy disks commonly rotate around 300–360 rpm; hard disks are much faster.

Track0
Sector0

Tap a sector on the platter, or use these selectors:

8-bit sector data
Select a sector, then READ or WRITE. The head must seek and the sector must rotate into position.

8. The technologies solve different problems

“Memory” and “storage” are not one thing. Designers choose technologies according to speed, density, persistence, cost, power and how often the data must change.

TechnologyPhysical stateKeeps data without power?Needs refresh?Typical role
Latch / flip-flopFeedback in logic gatesNoNoCPU state, control, registers
SRAMBistable transistor cell, commonly 6TNoNoCaches, small fast RAM
DRAMCharge on capacitor, commonly 1T1CNoYesMain memory
Mask ROM / PROM / EPROMFixed or programmed device patternYesNoFirmware and lookup tables
Magnetic coreMagnetization of ferrite ringYesNoHistorical main memory
Magnetic diskMagnetic domains on moving surfaceYesNoPersistent mass storage

From the lab to the real machines

Every historical computer is also a memory hierarchy.

The CPU only works because different technologies hold different kinds of state: tiny registers inside the processor, fast working RAM, immutable or semi-permanent firmware, and storage that survives power-off. The balance between those layers changed enormously from a 1970s kit computer to a 1990s workstation, but the hierarchy is already visible in the simple experiments above.