1. A transistor as an electronic switch
Start with the simplest useful idea: a small control signal determines whether current can flow through another path. This demonstration uses an NPN transistor because it is easy to visualize. Modern processors are built mostly from MOSFETs, but the digital abstraction — controlled switching between logic states — is the key idea.
2. Switches become logic gates
Once transistors are combined, the output can depend on more than one input. The diagrams use simplified NMOS/resistor logic so the switching topology remains visible: series pull-down transistors implement NAND; parallel pull-down transistors implement NOR. AND and OR follow by adding an inverter.
Transistor-network view
3. XOR + AND = a binary half-adder
This is the first point where the circuit performs arithmetic. XOR produces the low-order sum bit. AND detects the case where both inputs are 1 and therefore produces a carry into the next binary column.
SUM
CARRY
| A | B | Carry | Sum |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 0 |
4. Chain full adders into a 4-bit adder
A full adder accepts A, B and a carry-in. Four of them can add values from 0 to 15. When a low-order bit generates a carry, that carry ripples into the next stage — an early example of why circuit organization affects speed.
Operand A
Operand B
Change the input bits or load the example, then animate the addition from bit 0 to bit 3.
5. Put the adder inside a tiny 4-bit CPU
The following computer is intentionally small, but it is real in the important sense: it has memory, a program counter, an instruction register, a decoder, an accumulator, an ALU, flags and an output register. Each press of CLOCK advances one micro-step so the movement of information is visible.
Datapath
| Hex | Instruction | Effect |
|---|---|---|
| 0x | NOP | No operation |
| 1a | LDA a | ACC ← RAM[a] |
| 2a | STA a | RAM[a] ← ACC |
| 3a | ADD a | ACC ← ACC + RAM[a] |
| 4a | SUB a | ACC ← ACC − RAM[a] |
| 5a | AND a | ACC ← ACC AND RAM[a] |
| 6a | JMP a | PC ← a |
| 70 | OUT | OUT ← ACC |
| 8n | LDI n | ACC ← immediate nibble |
| F0 | HLT | Stop |
16-byte memory — click individual bits to edit
Each row stores one 8-bit byte. The high nibble is the opcode and the low nibble is an address or immediate value. The CPU datapath remains 4-bit.
From the lab to the real machines
The scale changes. The principle does not.
The tiny CPU above is deliberately primitive, but the same hierarchy — switches, gates, arithmetic, registers, control and memory — scales into the processors used throughout the museum. Real CPUs use vastly more sophisticated transistor structures, timing, buses, caches and execution techniques, but there is no magical boundary between logic and a computer.